An alternative digital multiplication demodulation method for electrical capacitance tomography

In this paper, a new digital demodulation method was proposed for capacitance measurement in AC-based electrical capacitance tomography (ECT) systems. The proposed demodulation method can be carried out in the following steps: (1) measure the phase difference between the in-phase reference signal, i.e., the digital form of the excitation signal, and the digitalized measurement signal by using the SignalTap II Logic Analyzer integrated in FPGA development kits; (2) delay the in-phase reference signal by a specified number of sampling periods according to the phase difference obtained in step (1) to ensure that the adjusted reference signal is completely in phase with the digitalized measurement signal; (3) multiply the digitalized measurement signal with the delayed reference signal point-by-point within one sine wave period, and then accumulate the products to obtain the demodulation result. The feasibility and effectiveness of the proposed digital demodulation method has been analyzed and verified by experimental results. Compared with the commonly used digital quadrature demodulation method, the proposed method can save resources of logic, memory and multiplier elements in the FPGA to a large extent without decreasing the signal to noise ratio (SNR) of the measurement result.