Title :
Parallel architecture for video processing in a smart camera system
Author :
Lv, Tiehan ; Ozer, Burak ; Wolf, Wayne
Author_Institution :
Dept. of Electr. Eng., Princeton Univ., NJ, USA
Abstract :
In this paper, we present our research on parallel architectures for a smart camera system. We analyze the available data independencies for a particular application, namely human detection and activity recognition, and discuss the potential architectures to exploit the parallelism resulted from these independencies. Three architectures-VLIW, symmetric parallel, and macro-pipeline architectures-are discussed and their performances are presented.
Keywords :
cameras; parallel architectures; performance evaluation; pipeline processing; video signal processing; VLIW architectures; data independencies; human activity recognition; human detection recognition; macro-pipeline architectures; parallel architecture performance; smart camera system; symmetric parallel architectures; video processing; Algorithm design and analysis; Computer architecture; Data analysis; Hardware; Humans; Parallel architectures; Parallel processing; Real time systems; Smart cameras; VLIW;
Conference_Titel :
Signal Processing Systems, 2002. (SIPS '02). IEEE Workshop on
Print_ISBN :
0-7803-7587-4
DOI :
10.1109/SIPS.2002.1049677
