• DocumentCode
    2486633
  • Title

    Integration of Mpeg-4 video tools onto multi-DSP architectures using AVSynDEx fast prototyping methodology

  • Author

    Nezan, Jean-Francois ; Raulet, Michael ; Deforges, Olivier

  • Author_Institution
    IETR / INSA Rennes, CNRS, Rennes, France
  • fYear
    2002
  • fDate
    16-18 Oct. 2002
  • Firstpage
    207
  • Lastpage
    212
  • Abstract
    Mpeg-4 is a response to the growing need for coding method that can facilitate access to visual objects in natural and synthetic moving pictures. Future real time audio-visual applications using Mpeg-4 will have very important time constraints, that can be achieved with the use of several calculation units. Sequential software solutions actually developed for single processors can hardly be projected onto multiprocessor architectures, leading to extra load of source code and calculations, but also to a sub-optimal use of the architecture parallelism. A functional data flow description of the application is then a well suited front-end for optimal multi-components implementation. This paper presents an Mpeg-4 decoder with such description formalism, allowing incremental building, and easy handing-over up to date of the algorithms. Furthermore, we show that the use of our AVSynDEx methodology enables its optimized implementation onto a multi-C6X platform.
  • Keywords
    digital signal processing chips; real-time systems; software prototyping; video coding; AVSynDEx fast prototyping methodology; Mpeg-4 video tools; coding method; data flow description; description formalism; incremental building; multi-C6X platform; multi-DSP architectures; natural moving pictures; optimal multi-components implementation; real time audio-visual applications; synthetic moving pictures; time constraints; visual objects; Application software; Computer architecture; Decoding; Design automation; High performance computing; MPEG 4 Standard; Prototypes; Software standards; Standards development; Switches;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Signal Processing Systems, 2002. (SIPS '02). IEEE Workshop on
  • ISSN
    1520-6130
  • Print_ISBN
    0-7803-7587-4
  • Type

    conf

  • DOI
    10.1109/SIPS.2002.1049710
  • Filename
    1049710