Title :
Techniques for implementing fast processor simulators
Author_Institution :
IBM Thomas J. Watson Res. Center, Yorktown Heights, NY, USA
Abstract :
In this paper we describe techniques that enable the implementation of a fast processor simulator. These techniques have been used to implement a detailed out-of-order processor simulator called Turandot that executes over 350 million instructions per hour
Keywords :
digital simulation; microprocessor chips; Turandot; fast processor simulators; out-of-order processor simulator; Design optimization; Microarchitecture; Out of order; Particle measurements; Process design; Workstations;
Conference_Titel :
Simulation Symposium, 1998. Proceedings. 31st Annual
Conference_Location :
Boston, MA
Print_ISBN :
0-8186-8418-6
DOI :
10.1109/SIMSYM.1998.668450
