Comparison of defect detection capabilities of current-based and voltage-based test methods

The industrial default to test random logic is based on stuck-at fault test patterns applied via scan-chains. This test-method can be described as static voltage testing. A second well-known method is I_DDQ resting, which can be described as static current testing. This second method is especially suited for detecting resistive shorts. For deep sub-micron technologies new defect mechanisms start to become important. Especially, opens are a much feared type of defect since static test methods are less suited to detect these defects. Dynamic test methods such as delay-fault testing and transient current testing could fill this gap in the test suite. The paper gives an overview of the aforementioned test-methods including some of the new current-based test methods necessary for deep submicron technologies and their defect detection capabilities