Title :
A 4.4-ns CMOS 54×54-b multiplier using pass-transistor multiplexer
Author :
Ohkubo, Norio ; Suzuki, Makoto ; Shinbo, Toshinobu ; Yamanaka, Toshiaki ; Shimizu, Akihiro ; Sasaki, Katsuro ; Nakagome, Yoshinobu
Author_Institution :
Central Res. Lab., Hitachi Ltd., Tokyo, Japan
Abstract :
A 54×54-b multiplier using pass-transistor multiplexer has been fabricated by 0.25-μm CMOS technology. To enhance the speed performance, a new 4-2 compressor and a carry look-ahead adder (CLA) both featuring the use of pass-transistor multiplexers have been developed. The new circuits have a speed advantage over conventional CMOS circuits because the number of critical-path gate stages is minimized due to the high logic functionality of pass-transistor multiplexers. The active size of the 54×54-b multiplier is 3.77 mm×3.41 mm. The multiplication time is 4.4 ns at 2.5 V power supply
Keywords :
CMOS logic circuits; adders; carry logic; multiplexing equipment; multiplying circuits; 0.25 micron; 2.5 V; 4-2 compressor; 4.4 ns; 54 bit; CMOS; carry look-ahead adder; critical-path gate stages; logic functionality; multiplication time; multiplier; pass-transistor multiplexer; Adders; CMOS logic circuits; CMOS technology; Carbon capture and storage; Delay; Microprocessors; Multiplexing; Power supplies; Research and development; Very large scale integration;
Conference_Titel :
Custom Integrated Circuits Conference, 1994., Proceedings of the IEEE 1994
Conference_Location :
San Diego, CA
Print_ISBN :
0-7803-1886-2
DOI :
10.1109/CICC.1994.379651
