Substrate-aware mixed-signal macro-cell placement in WRIGHT

Author

Mitra, Sujoy ; Rutenbar, R.A. ; Carley, L.R. ; Allstot, D.J.

Author_Institution

Dept. of Electr. & Comput. Eng., Carnegie Mellon Univ., Pittsburgh, PA, USA

fYear

1994

fDate

1-4 May 1994

Firstpage

529

Lastpage

532

Abstract

In this paper we describe a set of algorithms for handling substrate-coupled switching noise in an iterative placement framework. Our model for switching noise uses a coarse resistive grid method for analyzing the coupling of digital switching noise into the analog macros on the chip. The noise effects determined through these models are incorporated into a constrained, simulated annealing based macro cell placement flow. Our results indicate that these substrate-aware algorithms support efficient mixed signal placement optimization

Keywords

circuit layout CAD; integrated circuit layout; integrated circuit modelling; integrated circuit noise; mixed analogue-digital integrated circuits; simulated annealing; WRIGHT; analog macros; coarse resistive grid method; constrained simulated annealing; digital switching noise; iterative placement framework; mixed signal placement optimization; mixed-signal macro-cell placement; models; substrate-aware algorithms; substrate-coupled switching noise; Circuit noise; Circuit simulation; Cost function; Interference; Iterative algorithms; Routing; Semiconductor device noise; Silicon; Simulated annealing; Substrates;

fLanguage

English

Publisher

ieee

Conference_Titel

Custom Integrated Circuits Conference, 1994., Proceedings of the IEEE 1994

Conference_Location

San Diego, CA

Print_ISBN

0-7803-1886-2

Type

conf

DOI

10.1109/CICC.1994.379667

Filename

379667