Synchronized Blitz: A Lower Bound on the Forwarding Rate of Fully Meshed Traffic in Packet Switches

The precision of clock oscillators used in packet-based network devices is typically low. Thus, multiple nodes in a packet network, driven by different oscillators may transmit at slightly different port speeds, which may result in significant performance issues. In this paper, we show some of the performance issues that may be caused by clock wander. We use the well known benchmark of fully meshed traffic [RFC 2285] as a test case for analyzing the effect of clock tolerance on the performance of a switching device in a packet based network. We present a framework for analyzing the properties of clock synchronization and its effect on the forwarding rate of a switch. We then present the Synchronized Blitz, an all-to-one scenario where at any given time all incoming traffic into the switch is transmitted to a single port, and show that this scenario consumes more memory resources than any other scenario in our setting. Finally, we present a heuristic formula for a lower bound on the forwarding rate of a switch undergoing a mesh test. The lower bound computation is simple, and provides a useful tool for obtaining intuition about the performance of a device under a mesh test. We conclude by presenting simulation results that demonstrate the previous analysis.