DocumentCode
2489982
Title
Definitions of equivalence for transformational synthesis of embedded systems
Author
Cortés, Luis Alejandro ; Eles, Petru ; Peng, Zebo
Author_Institution
Dept. of Comput. & Inf. Sci., Linkoping Univ., Sweden
fYear
2000
fDate
2000
Firstpage
134
Lastpage
142
Abstract
Design of embedded systems is a complex task that requires design cycles founded upon formal notation, so that the synthesis from specification to implementation can be carried out systematically. The authors present a computational model for embedded systems based on Petri nets called PRES+. It includes an explicit notion of time and allows a concise formulation of models. Tokens, in our notation hold information, and transitions when fired perform transformation of data. Based on this model we define several notions of equivalence (reachable, behavioral, time, and total), which provide the framework for transformational synthesis of embedded systems. Different representations of an Ethernet network coprocessor are studied in order to illustrate the applicability of PRES+ and the definitions of equivalence on practical systems
Keywords
Petri nets; coprocessors; embedded systems; equivalence classes; formal specification; local area networks; Ethernet network coprocessor; PRES+; Petri nets; complex task; computational model; data transformation; design cycles; embedded systems design; equivalence; explicit notion; formal notation; transformational synthesis; Coprocessors; Costs; Embedded computing; Embedded system; Ethernet networks; Hardware; Network synthesis; Petri nets; Process design; Software systems;
fLanguage
English
Publisher
ieee
Conference_Titel
Engineering of Complex Computer Systems, 2000. ICECCS 2000. Proceedings. Sixth IEEE International Conference on
Conference_Location
Tokyo
Print_ISBN
0-7695-0583-X
Type
conf
DOI
10.1109/ICECCS.2000.873937
Filename
873937
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