• DocumentCode
    2490419
  • Title

    Working chips from high level synthesis: a case study from industry

  • Author

    Hunter, Robert W. ; Fuhrman, Thomas E. ; Thomas, Donald E.

  • Author_Institution
    Delco Electron. Corp., Kokomo, IN, USA
  • fYear
    1994
  • fDate
    1-4 May 1994
  • Firstpage
    144
  • Lastpage
    147
  • Abstract
    Despite intense activity in the high level synthesis research community over the past several years, to our knowledge no working fabricated chips from a general purpose high level synthesis tool have previously been reported. This paper describes the use of a high level synthesis tool to design two chips for future automotive applications. Both chips have been fabricated and tested and work correctly at speed in their target system. An FFT chip contains 176930 transistors and measures 241 by 245 mils, while a Viterbi chip contains 67790 transistors and measures 165 by 162 mils. Two weeks of combined high level synthesis for both chips replaced 9 man-months of detailed datapath schematic and control logic design
  • Keywords
    Viterbi decoding; automotive electronics; circuit CAD; fast Fourier transforms; high level synthesis; integrated circuit design; logic design; 162 to 245 mil; FFT chip; Viterbi chip; automotive applications; fabricated chips; high level synthesis; logic design; Algorithm design and analysis; Computer aided software engineering; Design optimization; Hardware design languages; High level synthesis; Logic design; Research and development; Semiconductor device measurement; Space exploration; Viterbi algorithm;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Custom Integrated Circuits Conference, 1994., Proceedings of the IEEE 1994
  • Conference_Location
    San Diego, CA
  • Print_ISBN
    0-7803-1886-2
  • Type

    conf

  • DOI
    10.1109/CICC.1994.379748
  • Filename
    379748