DocumentCode
2490545
Title
A 162 Mbit/s variable length decoding circuit using an adaptive tree search technique
Author
Ooi, Yasushi ; Taniguchi, Atsushi ; Demura, Shigeki
Author_Institution
VLSI Syst. Dev. Lab., NEC Corp., Japan
fYear
1994
fDate
1-4 May 1994
Firstpage
107
Lastpage
110
Abstract
A high-speed Huffman decoder for real-time video applications has been developed. The most dominant part of MPEG video bit-stream, DCT coefficients, can be decoded in 4 cycles or less using the proposed circuit, while the table size is smaller than the case of the conventional binary search. Bit-streams can be decoded up to 6 bit/cycle, which enables 162 Mbit/s decoding at 27 MHz
Keywords
Huffman codes; adaptive decoding; data compression; discrete cosine transforms; multimedia communication; tree searching; variable length codes; video signal processing; 162 Mbit/s; 27 MHz; DCT coefficients; MPEG video bit-stream; adaptive tree search technique; binary search; high-speed Huffman decoder; real-time video applications; table size; variable length decoding circuit; Binary trees; Circuits; Decoding; Discrete cosine transforms; Image coding; National electric code; Out of order; Streaming media; Transform coding; Video compression;
fLanguage
English
Publisher
ieee
Conference_Titel
Custom Integrated Circuits Conference, 1994., Proceedings of the IEEE 1994
Conference_Location
San Diego, CA
Print_ISBN
0-7803-1886-2
Type
conf
DOI
10.1109/CICC.1994.379756
Filename
379756
Link To Document