DocumentCode :
2490937
Title :
A Comparative Study on the Architecture Templates for Dynamic Nested Loops
Author :
Cong, Jason ; Zou, Yi
Author_Institution :
Comput. Sci. Dept., Univ. of California, Los Angeles, CA, USA
fYear :
2010
fDate :
2-4 May 2010
Firstpage :
251
Lastpage :
254
Abstract :
Loops are the most typical constructs that the FCCM community tries to accelerate. Many loop constructs have dynamic loop bounds and may face load balancing issues in their parallel realizations. In this paper we discuss different architecture templates for these dynamic nested loops, and show the benefits and trade-offs between various implementation strategies. We show that a statically scheduled architecture may perform better if the overhead in banking conflicts overwrites the benefits in load balancing by dynamic scheduled architectures.
Keywords :
parallel architectures; resource allocation; scheduling; software architecture; statistical analysis; architecture templates; dynamic nested loops; dynamic scheduled architectures; load balancing; parallel realization; statically scheduled architecture; Acceleration; Banking; Computer architecture; Computer science; Dynamic scheduling; Field programmable gate arrays; Load management; Parallel processing; Sparse matrices; USA Councils; Architecture Templates; Dynamic Nested Loops; FPGA; load balancing;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Field-Programmable Custom Computing Machines (FCCM), 2010 18th IEEE Annual International Symposium on
Conference_Location :
Charlotte, NC
Print_ISBN :
978-0-7695-4056-6
Electronic_ISBN :
978-1-4244-7143-0
Type :
conf
DOI :
10.1109/FCCM.2010.45
Filename :
5474041
Link To Document :
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