Title :
Integrating High-Level Synthesis into MPI
Author :
House, Andrew W H ; Saldaña, Manuel ; Chow, Paul
Author_Institution :
Edward S. Rogers Sr. Dept. of Electr. & Comput. Eng., Univ. of Toronto, Toronto, ON, Canada
Abstract :
In this paper, we investigate how easily we can port existing HPC applications that use MPI to run on HPRC systems, using three commercial high-level synthesis tools in conjunction with the ArchES-MPI software/hardware communication layer. Specifically, we examine how each tool interfaces with our existing message-passing hardware, and we present a sample application that illustrates how the interface can be used.
Keywords :
field programmable gate arrays; high level synthesis; message passing; parallel programming; ArchES-MPI software/hardware communication layer; HPC applications; MPI; high-level synthesis; high-performance reconfigurable computing; message passing interface; parallel programming; Acceleration; Application software; Communication system software; Context modeling; Field programmable gate arrays; Hardware; High level synthesis; Parallel programming; Software tools; Strontium; FPGA; HPRC; MPI; high-level synthesis; parallel programming; programming models; reconfigurable computing;
Conference_Titel :
Field-Programmable Custom Computing Machines (FCCM), 2010 18th IEEE Annual International Symposium on
Conference_Location :
Charlotte, NC
Print_ISBN :
978-0-7695-4056-6
Electronic_ISBN :
978-1-4244-7143-0
DOI :
10.1109/FCCM.2010.34
