• DocumentCode
    2491161
  • Title

    FPGA Circuit Synthesis of Accelerator Data-Parallel Programs

  • Author

    Bond, Barry ; Hammil, Kerry ; Litchev, Lubomir ; Singh, Satnam

  • Author_Institution
    Microsoft, Redmond, WA, USA
  • fYear
    2010
  • fDate
    2-4 May 2010
  • Firstpage
    167
  • Lastpage
    170
  • Abstract
    This paper describes the techniques used to describe and synthesize FPGA circuits expressed in a data-parallel domain specific language (DSL) called Accelerator. We identify the subset of data-parallel descriptions that are supported by our system and explain how we track memory access patterns which allow us to generate efficient FPGA circuits.
  • Keywords
    electronic engineering computing; field programmable gate arrays; logic design; network synthesis; parallel programming; specification languages; Accelerator data-parallel program; FPGA circuit synthesis; data-parallel description; domain specific language; memory access pattern; Circuit synthesis; Field programmable gate arrays;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Field-Programmable Custom Computing Machines (FCCM), 2010 18th IEEE Annual International Symposium on
  • Conference_Location
    Charlotte, NC
  • Print_ISBN
    978-0-7695-4056-6
  • Electronic_ISBN
    978-1-4244-7143-0
  • Type

    conf

  • DOI
    10.1109/FCCM.2010.51
  • Filename
    5474053
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=2491161