DocumentCode
2491686
Title
Embedded systems verification with FGPA-enhanced in-circuit emulator
Author
Meerwein, M. ; Baumgartner, C. ; Wieja, T. ; Glauert, W.
Author_Institution
Robert Bosch GmbH, Stuttgart, Germany
fYear
2000
fDate
2000
Firstpage
143
Lastpage
148
Abstract
We present a novel coverification concept for embedded microcontrollers that satisfies industrial requirements. Based on a commercially available CPU in-circuit emulator coupled with FPGA boards, it verifies the correctness of an implementation in terms of function and timing within a real-world environment. Using our system, the software engineer can write, test and optimize programs for a chip that is not yet physically existent. In addition the system is used to obtain software module characterization data required for system partitioning. Its ability to integrate analog circuitry enables verification of the complete system-on-chip. Our methodology is fully integrated into the ASIC design flow providing ease of use and a high level of verification accuracy
Keywords
application specific integrated circuits; embedded systems; field programmable gate arrays; formal verification; hardware-software codesign; microcontrollers; timing; ASIC design; CPU; FGPA; coverification; embedded microcontrollers; embedded systems verification; in-circuit emulator; program optimization; program testing; software engineer; software module characterization; system partitioning; system-on-chip; timing; Circuit testing; Embedded system; Field programmable gate arrays; Microcontrollers; Software systems; Software testing; System testing; System-on-a-chip; Systems engineering and theory; Timing;
fLanguage
English
Publisher
ieee
Conference_Titel
System Synthesis, 2000. Proceedings. The 13th International Symposium on
Conference_Location
Madrid
ISSN
1080-1820
Print_ISBN
0-7695-0765-4
Type
conf
DOI
10.1109/ISSS.2000.874041
Filename
874041
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