A Low-Power adaptive biasing CMOS Operational Amplifier with enhanced DC-Gain

Author

Dalena, Francesco ; Giannini, Vito ; Baschirotto, Andrea

Author_Institution

STMicroelectron.

fYear

0

fDate

0-0 0

Firstpage

165

Lastpage

168

Abstract

A new circuit topology for a low-voltage low-power class AB amplifier is presented. The circuit uses adaptive bias to have a better efficiency in driving high capacitive loads. Indeed, being the amplifier bias current dependent on the applied input signal, its slew rate strongly improves so enabling the op-amp to deal with large input signals. Differently than the typical adaptive biased amplifier, we introduce a positive feedback at the input stage to enhance the op-amp DC gain up to 90dB. The circuit has been designed in a 0.5mum CMOS technology. Simulation results are shown. The circuit presents a quiescent supply current of only 10muA. It is able to settle in 1mus with 0.1% of error for a 0.4V input voltage step and 10pF of load capacitance

Keywords

CMOS integrated circuits; circuit feedback; integrated circuit design; low-power electronics; operational amplifiers; 0.4 V; 0.5 micron; 10 muA; 10 pF; CMOS technology; adaptive biased amplifier; capacitive load; circuit design; circuit topology; class AB amplifier; operational amplifier; Analog circuits; CMOS technology; Circuit topology; Energy consumption; Feedback; Impedance; Operational amplifiers; Tail; Very large scale integration; Voltage;

fLanguage

English

Publisher

ieee

Conference_Titel

Research in Microelectronics and Electronics 2006, Ph. D.

Conference_Location

Otranto

Print_ISBN

1-4244-0157-7

Type

conf

DOI

10.1109/RME.2006.1689922

Filename

1689922