Inter-Processor Communication Performance of a Hierarchical Torus Network under Bit-Flip Traffic Patterns

In this paper, we present a deadlock-free routing algorithm for the hierarchical torus network (HTN) using 2 virtual channels - 2 being the minimum number for dimension order routing - and evaluate the network´s inter-processor communication performance under the bit-flip traffic pattern using the proposed routing algorithm. We evaluate the inter-processor communication performance of HTN, H3D-mesh, TESH, mesh, and torus network by computer simulation. It is shown that the inter-processor communication performance of the HTN is better than that of the H3D-mesh, TESH, mesh, and torus networks.