DocumentCode :
2492640
Title :
A 6-bit, 1.2 GHz Interleaved SAR ADC in 90nm CMOS
Author :
Dondi, Silvia ; Vecchi, Davide ; Boni, Andrea ; Bigi, Marco
Author_Institution :
Dipt. di Ingegneria dell´´ Informazione, Parma Univ.
fYear :
0
fDate :
0-0 0
Firstpage :
301
Lastpage :
304
Abstract :
A 6-bit time-interleaved analog-to-digital converter for ultra-wide band applications is proposed. The structure consists of seven successive approximation A/D converters designed to pursue high speed and low power consumption. A merged-capacitor technique is implemented in the DAC, while the successive approximations register is based on a single-row architecture with D-FF´s. The converter, designed in ST 90nm CMOS technology exhibits a maximum sampling frequency of 1.2 GHz at 1 V supply with a 500 mV input range and 16 mW of power consumption. The simulated figure of merit is 0.3 pJ/conv
Keywords :
CMOS integrated circuits; UHF integrated circuits; analogue-digital conversion; digital-analogue conversion; low-power electronics; ultra wideband technology; 1 V; 1.2 GHz; 16 mW; 6 bit; 90 nm; CMOS technology; DAC; analog-to-digital converter; interleaved SAR ADC; merged-capacitor technique; single-row architecture; successive approximation register; ultra-wide band applications; Analog-digital conversion; Approximation algorithms; CMOS technology; DVD; Energy consumption; Frequency conversion; Hard disks; Logic devices; Sampling methods; Satellites;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Research in Microelectronics and Electronics 2006, Ph. D.
Conference_Location :
Otranto
Print_ISBN :
1-4244-0157-7
Type :
conf
DOI :
10.1109/RME.2006.1689956
Filename :
1689956
Link To Document :
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