Digital RF

Author

Staszewski, Roman

Author_Institution

Texas Instrum. Inc., Dallas, TX

fYear

0

fDate

0-0 0

Firstpage

8

Lastpage

8

Abstract

Summary form only given. A low key phenomenon received attention only from few technologists. This phenomenon was the ability to reliably scale a CMOS transistor below a certain size, so it could digitally switch at RF frequency rate. This was the birth of "digital RF". This opened new doors to wireless communication implementation - reliably and inexpensively. This article describes the rationale behind this new paradigm, overviews how Texas Instruments manifested digital RF in its digital radio processor (DRP) technology. Both digital and RF/analog designers claim they have proven sufficient design methodologies. But, the world demands efficiency, the latest technology for pennies. While tight integration of RF and digital in SOC is the cost effective answer, it opens a design methodology Pandora box. The resulting paradigm change affects all aspects of the design process from system architecture to circuit design to validation to test

Keywords

CMOS integrated circuits; digital radio; integrated circuit design; microprocessor chips; radiofrequency integrated circuits; system-on-chip; transistors; CMOS transistor; Pandora box design methodology; RF frequency switching; SOC design; Texas Instruments; analog design; circuit design; circuit scaling; circuit testing; circuit validation; digital RF; digital design; digital radio processor technology; system architecture; wireless communication implementation;

fLanguage

English

Publisher

ieee

Conference_Titel

Digital System Design: Architectures, Methods and Tools, 2006. DSD 2006. 9th EUROMICRO Conference on

Conference_Location

Dubrovnik

Print_ISBN

0-7695-2609-8

Type

conf

DOI

10.1109/DSD.2006.45

Filename

1690014