Resource-Efficient Routing and Scheduling of Time-Constrained Network-on-Chip Communication

Author

Stuijk, Sander ; Basten, Twan ; Geilen, Marc ; Ghamarian, Amir Hossein ; Theelen, Bart

Author_Institution

Dept. of Electr. Eng., Electron. Syst., Eindhoven Univ. of Technol.

fYear

0

fDate

0-0 0

Firstpage

45

Lastpage

52

Abstract

Network-on-chip-based multiprocessor systems-on-chip are considered as future embedded systems platforms. One of the steps in mapping an application onto such a parallel platform involves scheduling the communication on the network-on-chip. This paper presents different scheduling strategies that minimize resource usage by exploiting all scheduling freedom offered by networks-on-chip. Our experiments show that resource-utilization is improved when compared to existing techniques

Keywords

embedded systems; microprocessor chips; multiprocessing systems; network routing; network-on-chip; processor scheduling; resource allocation; embedded system platform; network-on-chip-based multiprocessor systems-on-chip; parallel platform; resource usage minimization; resource-efficient routing; time-constrained network-on-chip communication scheduling; Bandwidth; Computer architecture; Delay; Multimedia systems; Multiprocessing systems; Network-on-a-chip; Processor scheduling; Routing; Throughput; Timing;

fLanguage

English

Publisher

ieee

Conference_Titel

Digital System Design: Architectures, Methods and Tools, 2006. DSD 2006. 9th EUROMICRO Conference on

Conference_Location

Dubrovnik

Print_ISBN

0-7695-2609-8

Type

conf

DOI

10.1109/DSD.2006.81

Filename

1690019