Title :
A new generation modechart verifier
Author :
Yang, Jin ; Mok, Aloysius K. ; Stuart, Douglas
Author_Institution :
Dept. of Comput. Sci., Texas Univ., Austin, TX, USA
Abstract :
We have implemented a new-generation modechart verifier called vf3. The new verifier is capable of dealing with modecharts with arbitrary hierarchy. More importantly, it employs several novel strategies to effectively reduce the search space while speeding up the verification process. It represents the computation graph for a modechart in a more compact form called a `zone-based computation graph´. It uses on-the-fly deterministic pruning to reduce the outgoing edges from nodes in a graph. Finally, it builds on-the-fly a quotient graph based on a given real-time logic (RTL) formula. Our experimental results show that vf3 reduces the sizes of computation graphs by factors ranging from 2 to 10
Keywords :
computer aided software engineering; diagrams; formal verification; graph theory; real-time systems; SARTOR project; arbitrary hierarchy; graph nodes; graph size; modechart verifier; on-the-fly deterministic pruning; operational semantics; outgoing edge reduction; quotient graph; real-time logic formula; search space reduction; verification process speed; vf3; zone-based computation graph; Computational modeling; Concurrent computing; Contracts; Explosions; Interleaved codes; Logic; Real time systems; Software tools; Sufficient conditions; Whales;
Conference_Titel :
Real-Time Technology and Applications Symposium, 1995. Proceedings
Conference_Location :
Chicago, IL
Print_ISBN :
0-8186-6980-2
DOI :
10.1109/RTTAS.1995.516208