The impact of semiconductor technology scaling on CMOS radio

The impact of nm CMOS technology on the various RF circuit components such as active, passive and digital circuits is presented. Firstly the impact of scaling on the LNA noise and linearity is thoroughly analyzed for the active circuits. Then two new circuits inventions named CCPP (CMOS complementary parallel push-pull) circuit and the use of parasitic V-NPN (Vertical-NPN) bipolar transistor for DCR (direct conversion receiver) are introduced. In CCPP, the high RF performance of PMOS comparable to NMOS, provides single ended differential RF signal processing capability without the use of bulky balun. The use of parasitic V-NPN(Vertical-NPN) bipolar transistor, available free in triple well CMOS technology, has shown to provide more than an order of magnitude improvement in 1/f noise and DC offset related problems, which have been the bottleneck for CMOS single chip integration. Then CMOS technologies scaling for various passive devices, performance scaling for the inductor, variable capacitors MIM capacitor, and switched capacitor, is discussed. Both the forward scaling of the active layer as well as the inverse scaling of interconnection layer, i.e., more interconnection layers with effectively thicker total dielectric and metal layers, provide very favorable scenario for all passive devices. Finally the impact of CMOS scaling on the various digital circuits are analyzed, taking the digital modem blocks, on the various digital calibration circuits, on the switching RF power amplifier, and eventually on the software designed radio, as examples.