DocumentCode :
2495333
Title :
Flexible Bus and NoC Performance Analysis with Configurable Synthetic Workloads
Author :
Thid, Rikard ; Sander, Ingo ; Jantsch, Axel
Author_Institution :
R. Inst. of Technol., Stockholm
fYear :
0
fDate :
0-0 0
Firstpage :
681
Lastpage :
688
Abstract :
We present a flexible method for bus and network on chip performance analysis, which is based on the adaptation of workload models to resemble various applications. Our analysis method assists in the selection of a communication infrastructure early in the design process. The method uses (1) synthetic workload models which are similar to timed Petri nets and (2) the b-model for self-similar workloads. This allows the exploration of larger portions of the design space than possible with traditional stochastic models. The method is illustrated with tutorial examples where both a NoC and a bus based platform are analyzed
Keywords :
Petri nets; network-on-chip; system buses; NoC performance analysis; Petri nets; configurable synthetic workload; system buses; traditional stochastic model; Adaptation model; Analytical models; Context modeling; Delay; Microprocessors; Network-on-a-chip; Performance analysis; Runtime; Stochastic processes; Traffic control;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Digital System Design: Architectures, Methods and Tools, 2006. DSD 2006. 9th EUROMICRO Conference on
Conference_Location :
Dubrovnik
Print_ISBN :
0-7695-2609-8
Type :
conf
DOI :
10.1109/DSD.2006.52
Filename :
1690104
Link To Document :
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