DocumentCode :
2496327
Title :
New developments in flip chip
Author :
Vardaman, E. Jan
Author_Institution :
TechSearch Int., Inc., Austin, TX
fYear :
2008
fDate :
1-2 Dec. 2008
Firstpage :
99
Lastpage :
101
Abstract :
Flip chip interconnect has been adopted for a variety of applications. Drivers for adoption continue to be performance and form factor. Flip chip interconnect is expanding into many device types ranging from high performance logic to a variety of LSIs found in wireless products. Some form of bump connection is also used for chip-to-wafer or wafer-to-wafer connections in through silicon via (TSV) technology or chip-to-chip interconnection. This interconnect technology is increasingly referred to as a micro bump. This presentation examines the new developments in flip chip interconnect, including various types of bumps such as solder (both Pb-free and conventional) copper pillar, stud bumps, and micro bumps. Pitch trends and the impact on substrate design rules are also examined. Both laminate and silicon substrates are discussed.
Keywords :
flip-chip devices; integrated circuit interconnections; laminates; solders; Si; bump connection; chip-to-chip interconnection; chip-to-wafer connections; flip chip interconnect; form factor; high performance logic; interconnect technology; microbump; through-silicon-via technology; wafer-to-wafer connections; Bonding; Copper; Flip chip; Gold; Lead; Logic devices; Microprocessors; Mobile handsets; Packaging; Wire;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
VLSI Packaging Workshop of Japan, 2008. VPWJ 2008. IEEE 9th
Conference_Location :
Kyoto
Print_ISBN :
978-1-4244-3498-5
Type :
conf
DOI :
10.1109/VPWJ.2008.4762219
Filename :
4762219
Link To Document :
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