Title :
Fast window test method of hysteresis test
Author_Institution :
Test Assistance Group, Teradyne Inc., Makati, Philippines
Abstract :
The conventional method of hysteresis test for digital input pin, as defined by (Vih-Vil), performs two VLS (Voltage Level Search) to measure the actual Vih and Vil. A typical tester spends an average of 120 ms for each VLS, resulting in a test time of 240 ms for each pin requiring a hysteresis test. This paper introduces a new method which is 70 times faster than the conventional method. The presented test algorithm is in pseudo-code format for easy translation to PASCAL, C, FORTRAN, or other language
Keywords :
automatic test software; digital integrated circuits; hysteresis; integrated circuit testing; digital IC testing; digital input pin; fast window test method; hysteresis test; pseudo-code format; test algorithm; voltage level search; Design engineering; Hysteresis; Inspection; Manufacturing; Performance evaluation; Software packages; Software testing; Testing; Threshold voltage; Trigger circuits;
Conference_Titel :
Test Symposium, 1998. ATS '98. Proceedings. Seventh Asian
Print_ISBN :
0-8186-8277-9
DOI :
10.1109/ATS.1998.741611