DocumentCode
2497020
Title
Testing and diagnosis of interconnect structures in FPGAs
Author
Wang, Sying-Jyan ; Huang, Chao-Neng
Author_Institution
Inst. of Comput. Sci., Nat. Chung-Hsing Univ., Taichung, Taiwan
fYear
1998
fDate
2-4 Dec 1998
Firstpage
283
Lastpage
287
Abstract
Since Field Programmable Gate Arrays (FPGAs) are reprogrammable, faults in them can be easily tolerated once fault sites are located. Previous research on diagnosis of FPGAs mainly deal with faulty logic blocks. In this paper we present a method for the testing and diagnosis of faults in the interconnect structures of FPGAs. A predefined set of tests that can locate all single faults and many multiple faults is presented. Other multiple faults can be located with an adaptive test set. This work, combined with previous works on the diagnosis of faulty logic blocks in FPGAs, makes it possible to utilize FPGAs with faults
Keywords
fault diagnosis; fault location; field programmable gate arrays; integrated circuit interconnections; integrated circuit testing; logic testing; FPGAs; adaptive test set; fault diagnosis; faulty logic blocks; field programmable gate arrays; interconnect structures; multiple faults; single faults; testing; Application specific integrated circuits; Circuit faults; Circuit testing; Fault diagnosis; Field programmable gate arrays; Integrated circuit interconnections; Logic testing; Programmable logic arrays; Routing; Samarium; Switches;
fLanguage
English
Publisher
ieee
Conference_Titel
Test Symposium, 1998. ATS '98. Proceedings. Seventh Asian
ISSN
1081-7735
Print_ISBN
0-8186-8277-9
Type
conf
DOI
10.1109/ATS.1998.741626
Filename
741626
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