DocumentCode
2497199
Title
Power analysis of DRAMs
Author
Vollrath, Jorg ; Huebl, Markus ; Stahl, Ernst
Author_Institution
Siemens AG, Germany
fYear
1998
fDate
2-4 Dec 1998
Firstpage
334
Lastpage
339
Abstract
Power consumption for a dynamic random access memory (DRAM) is specified in a data sheet for active and standby mode as maximum average values. Further insight into DRAM operation can be gained by analyzing time behavior of the active current. Average current measurement techniques are presented in this paper to analyze time dependent current components and to calculate bitline and interbitline capacitances from power consumption
Keywords
DRAM chips; capacitance; electric current measurement; integrated circuit testing; timing; DRAM operation; DRAM testing; active current; average current measurement techniques; bitline capacitance; dynamic RAM; dynamic current measurement method; dynamic random access memory; interbitline capacitance; power analysis; power consumption; time behavior; time dependent current components; Capacitance; Circuit noise; Circuits; Content addressable storage; Current measurement; Decoding; Energy consumption; Power measurement; Power supplies; Probes; Random access memory; Read-write memory; Voltage;
fLanguage
English
Publisher
ieee
Conference_Titel
Test Symposium, 1998. ATS '98. Proceedings. Seventh Asian
ISSN
1081-7735
Print_ISBN
0-8186-8277-9
Type
conf
DOI
10.1109/ATS.1998.741635
Filename
741635
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