• DocumentCode
    2497259
  • Title

    Low power analysis in single stage source coupled VCO with AVL technique using nanoscale CMOS technology

  • Author

    Shrivastava, Ashish ; Khandelwal, Sourabh ; Akashe, Shyam

  • Author_Institution
    Dept. of Electron. & Commun. Eng., ITM Univ., Gwalior, India
  • fYear
    2013
  • fDate
    12-14 April 2013
  • Firstpage
    1
  • Lastpage
    6
  • Abstract
    The voltage controlled oscillator (VCO) is the core factor of Phase locked loop (PLL) oscillation frequency synthesizes, which is mainly used in modern electronics information processing systems. Multi stages VCO ring provide less oscillation frequency and high phase noise, so the single-stage source overcomes these problems. This paper presents a comparison between leakage power Reduction techniques AVL (AVLG & AVLS) assuming static and dynamic power consumption. The simulation results have reported that static power (1.35pW), dynamic power (0.74nW) and phase noise (-42.29dBc/Hz) improve using AVLG technique in nanoscale measurement with supply voltage varying from (0.7V to 1.2V).
  • Keywords
    CMOS integrated circuits; low-power electronics; nanotechnology; oscillations; phase locked loops; voltage-controlled oscillators; AVL technique; PLL oscillation frequency; electronics information processing systems; low power analysis; nanoscale CMOS technology; phase locked loop oscillation frequency; single stage source coupled VCO; voltage controlled oscillator; Electronic learning; Electronic publishing; Encyclopedias; Service-oriented architecture; Vocabulary; AVL; Cadence Virtuoso; Phase Noise; Source Coupled VCO; Static & Dynamic power;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Engineering and Systems (SCES), 2013 Students Conference on
  • Conference_Location
    Allahabad
  • Print_ISBN
    978-1-4673-5628-2
  • Type

    conf

  • DOI
    10.1109/SCES.2013.6547488
  • Filename
    6547488