Process Variation and Voltage Scaling Optimization Techniques for Processing Signals Using Multirate

A Paper presents new scaling techniques of multirate digital signal processing system. It has been done with 0.45 nm synopsis tool and AMI 0.6 um and TSMC 0.25 um technology at different voltages. All basic Multirate modules are design using Active-HDL and QUARTUS-II platform then it is synthesized on FPGA Alter a DE-1 kit. For the optimization of coefficient transistor level circuits are design then it is simulated and synthesized on cadence platform. The circuit design is verified and implemented successfully for low power and high speed. The proposed methodology provides systematic techniques for high speed operation at a low power supply. Authors have design and implemented multirate modules up sampler, down sampler, interpolator and decimator which has given full custom design with different circuit topology and optimization level. The observations of parameters area, power and speed are taken at different voltages and technology. Finally, design and implementation of the modules are verified and report is presented.