A dual-application low-power FFT processor for WLAN-integrated SD-OCT systems

This paper presents a dual-application FFT processor for spectral domain optical coherence tomography (SD-OCT) systems integrated with a wireless local area networking (WLAN) module. A high-radix multimode FFT kernel together with the four-path memory-data access scheme is proposed to improve the hardware efficiency. By the proposed memory-based architecture, multimode 2048/1024-point FFT×2 (for SD-OCT) or 128/64-point FFT×4 (for WLAN) can be performed in an energy-efficient manner. A test chip has been designed using a TSMC 0.18μm process with a core area of 4.12 mm². Through post-layout simulation, the power consumption is 69.2 mW and 72.7 mW at 40 MHz for OCT/2048-point FFT×2 and WLAN/128-point FFT×4 modes, respectively. Compared to the referred, the power saving of 26%~53% can be achieved using the proposed design.