Effect of rapid thermal annealing on electrical properties of capped InP for MISFET device application

InP is a promising substrate material for many microelectronic device applications. However, a crucial step in the process of fabrication of these devices is the post implantation annealing. Owing to phosphorous volatility, the InP surface is very sensitive to heat treatment, especially when high temperatures are required. An annealing procedure has been previously used in the process of fabrication of an InP MISFET which showed excellent static performance. This method consists of growth of a one micron thick lattice matched InGaAs layer by molecular beam epitaxy (MBE). This layer acts at the same time as an implantation mask and a protecting cap for the channel area during the high temperature post implantation annealing. Capacitance-voltage measurements and deep level transient spectroscopy analysis have been implemented for the purpose of investigating the effects of thermal treatments on the properties of the channel area underneath the InGaAs capping layer for this new method of encapsulation of InP. Thermal treatments involved in this particular technology are post implantation rapid thermal annealing, and the high temperature stage during the epitaxial growth