Title :
Low power design of RFID tags
Author :
Yao, X. ; Wang, X.A. ; Huang, J.F. ; Ye, M.
Author_Institution :
Key Lab. of Integrated Micro-Syst., Peking Univ., Shenzhen, China
Abstract :
Low-power design is essential for passive RFID tags to achieve expected level of sensitivity. Considering the mechanism of the passive tags powered, a low peak power is also important. This paper is focused on optimization on peak power. A tag IC is also presented. The IC, which is compatible with the EPC C1G2 RFID protocol, was designed and fabricated successfully by using a 0.18μm process, with a tested sensitivity of -16dBm.
Keywords :
optimisation; protocols; radiofrequency identification; EPC C1G2 RFID protocol; low power RFID tag design; optimization; passive tags; sensitivity level; tag IC; Clocks; Delay; Feedback loop; Power demand; Radiofrequency identification; Registers; Sensitivity; RFID; asynchronous design; passive tag; peak power;
Conference_Titel :
Anti-Counterfeiting, Security and Identification (ASID), 2011 IEEE International Conference on
Conference_Location :
Xiamen
Print_ISBN :
978-1-61284-631-6
DOI :
10.1109/ASID.2011.5967422
