DocumentCode
2501512
Title
Distributed syndrome decoding for regular interconnected structures
Author
Somani, A.K. ; Agarwal, V.K.
Author_Institution
Dept. of Electr. Eng., Washington Univ., Seattle, WA, USA
fYear
1989
fDate
21-23 June 1989
Firstpage
70
Lastpage
77
Abstract
Distributed syndrome decoding algorithms to locate faulty PEs (processing elements) in large-scale regular interconnected structures based on the concepts of system-level diagnosis are developed. These algorithms operate in a systolic manner to locate the faulty processors. The computational complexities of these algorithms are either linear or sublinear, depending on the architecture of the system. Their implementation complexities and diagnosis capabilites differ substantially. The conditions that a fault pattern should satisfy for correct and complete diagnosis and the maximum global size of fault sets which can be diagnosed successfully using these algorithms are also identified.<>
Keywords
computational complexity; fault tolerant computing; parallel architectures; computational complexities; distributed syndrome decoding algorithm; fault location; fault pattern; faulty processors; large-scale regular interconnected structures; system-level diagnosis; Computational complexity; Decoding; Distributed computing; Fault diagnosis; Fault tolerant systems; Laboratories; Large-scale systems; System testing; Very large scale integration; Wafer scale integration;
fLanguage
English
Publisher
ieee
Conference_Titel
Fault-Tolerant Computing, 1989. FTCS-19. Digest of Papers., Nineteenth International Symposium on
Conference_Location
Chicago, IL, USA
Print_ISBN
0-8186-1959-7
Type
conf
DOI
10.1109/FTCS.1989.105545
Filename
105545
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