DocumentCode
2502774
Title
Self-adaptive power gating with test circuit for on-line characterization of energy inflection activity
Author
Trivedi, Amit Ranjan ; Mukhopadhyay, Saibal
Author_Institution
Dept. of ECE, Georgia Inst. of Technol., Atlanta, GA, USA
fYear
2012
fDate
23-25 April 2012
Firstpage
38
Lastpage
43
Abstract
A test circuit is presented for post-silicon and on-line characterization of the energy-inflection activity of power-gated circuits (the activity when overhead energy is equal to leakage savings) under static (process) and dynamic (voltage/temperature/input) variations. The test circuit is applied to design self-adaptive power-gating for energy-efficient SRAM.
Keywords
CMOS memory circuits; SRAM chips; circuit testing; field effect memory circuits; energy inflection activity; energy-efficient SRAM; online characterization; power-gated circuits; self-adaptive power gating; test circuit; Arrays; Correlation; Logic gates; Random access memory; Switches; Switching circuits; Transistors; Energy-efficiency; On-line characterization; Power-gating; SRAM; Self- adaptation;
fLanguage
English
Publisher
ieee
Conference_Titel
VLSI Test Symposium (VTS), 2012 IEEE 30th
Conference_Location
Hyatt Maui, HI
ISSN
1093-0167
Print_ISBN
978-1-4673-1073-4
Type
conf
DOI
10.1109/VTS.2012.6231077
Filename
6231077
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