Title :
Integrated Modeling, Generation and Optimization for Packet based NoC Topology
Author :
Jueping, Cai ; Zheng, Liu ; Ming, Du ; Zan, Li ; Lei, Yao
Author_Institution :
Microelectron. Sch., Xidian Univ., Xi´´an, China
Abstract :
In this paper, a methodology based on the cost of bus throughput, transmission latency and power consumption is proposed to achieve integrated optimization of NoC topology modeling and generation. The optimized framework´s static and dynamic properties ensure efficient core-to-core communication of the complete network. Our approach 1) fully exploits the regularity of standard topology and the flexibility of application-specific topology 2) generates a scalable network containing heterogeneous topologies, which raises the abstraction level of reuse from resources to subnets 3) satisfies NoC application. The performances of the topology are simulated and compared between the proposed methodology and regular NoC topologies, including mesh and optimal mesh architecture. Experimental results show the proposed design flow is efficient to provide better performance for predefined requirements, and minimal cost function is achieved. In addition, we applied several multimedia applications as case studies.
Keywords :
network topology; network-on-chip; optimisation; NoC topology; core-to-core communication; dynamic properties; heterogeneous topologies; integrated modeling; multimedia applications; optimal mesh architecture; power consumption; transmission latency; Cost function; Delay; Design methodology; Design optimization; Integrated circuit interconnections; Network topology; Network-on-a-chip; Optimization methods; Power generation; Throughput; NoC; Optimization; Topology modeling;
Conference_Titel :
Advanced Information Networking and Applications (AINA), 2010 24th IEEE International Conference on
Conference_Location :
Perth, WA
Print_ISBN :
978-1-4244-6695-5
DOI :
10.1109/AINA.2010.106