DocumentCode
2503144
Title
Static test compaction for transition faults under the hazard-based detection conditions
Author
Pomeranz, Irith
Author_Institution
Sch. of Electr. & Comput. Eng., Purdue Univ., West Lafayette, IN, USA
fYear
2012
fDate
23-25 April 2012
Firstpage
176
Lastpage
181
Abstract
The conventional detection conditions for transition faults require a transition at the fault site for activating a fault. The hazard-based detection conditions allow a transition fault to be activated by a pulse. Earlier, the hazard-based detection conditions were used for obtaining more accurate estimates of transition fault coverage and for more accurate defect diagnosis. This paper considers their use for test compaction. The procedure described in this paper replaces the conventional detection conditions with the hazard-based detection conditions for some faults. The use of the hazard-based detection conditions allows each test to detect more faults, thus allowing the number of tests to be reduced.
Keywords
fault diagnosis; logic testing; defect diagnosis; hazard-based detection conditions; static test compaction; transition fault coverage; transition faults; Benchmark testing; Circuit faults; Compaction; Educational institutions; Fault detection; Hazards; Vectors; Broadside tests; hazards; skewed-load tests; static test compaction; transition faults;
fLanguage
English
Publisher
ieee
Conference_Titel
VLSI Test Symposium (VTS), 2012 IEEE 30th
Conference_Location
Hyatt Maui, HI
ISSN
1093-0167
Print_ISBN
978-1-4673-1073-4
Type
conf
DOI
10.1109/VTS.2012.6231099
Filename
6231099
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