Title :
A power-aware variable-precision multiply-accumulate unit
Author :
Chang, Jin-Kyu ; Lee, Hanho ; Choi, Chang-Seok
Author_Institution :
Sch. of Inf. & Commun. Eng., Inha Univ., Incheon, South Korea
Abstract :
An energy-efficient power-aware design is highly desirable for digital signal processing (DSP) functions that encounter a wide diversity of operating scenarios in battery-powered wireless sensor network systems. Addressing this issue, this paper presents a power-aware variable-precision multiply-accumulate (VP-MAC) unit that makes use of dynamic-range detection unit and a 16-bit scalable Baugh-Wooley multiplier with fixed-width error compensation circuit for DSP applications. The proposed VP-MAC contains both an 8-bit and a 16-bit multiplier and has input gating to route the data to appropriate hardware. When 16-bit multiplication is needed, the entire multiplier is used. However, if only 8-bit multiplication is needed, the 8-bit logic is enabled. Simulated and measured results show a reduced power-consumption of 43% and reduced gate count of 42.7% respectively, in comparison with conventional power-aware scalable pipelined MAC unit.
Keywords :
digital signal processing chips; multiplying circuits; wireless sensor networks; 16-bit multiplication; 16-bit scalable Baugh-Wooley multiplier; 8-bit multiplication; DSP; MAC unit; battery-powered wireless sensor network systems; digital signal processing functions; dynamic-range detection unit; energy-efficient power-aware design; fixed-width error compensation circuit; power-aware variable-precision multiply-accumulate unit; Circuits; Design engineering; Digital signal processing; Energy efficiency; Hardware; Logic; Power engineering and energy; Signal generators; Switches; Wireless sensor networks;
Conference_Titel :
Communications and Information Technology, 2009. ISCIT 2009. 9th International Symposium on
Conference_Location :
Icheon
Print_ISBN :
978-1-4244-4521-9
Electronic_ISBN :
978-1-4244-4522-6
DOI :
10.1109/ISCIT.2009.5341060