DocumentCode
2503479
Title
Tutorial 1
Author
Karri, Ramesh ; Song, Peilin ; Sinanoglu, Ozgur
Author_Institution
NYU-Poly, New York, NY, USA
fYear
2012
fDate
23-25 April 2012
Abstract
This tutorial is most suitable for DFT and Test Engineers, Validation and Verification engineers, Researchers and students in DFT, testing and validation, hardware security.
Keywords
VLSI; design for testability; integrated circuit testing; security; DFT; VLSI security; VLSI test; hardware security; test engineers; validation engineers; verification engineers;
fLanguage
English
Publisher
ieee
Conference_Titel
VLSI Test Symposium (VTS), 2012 IEEE 30th
Conference_Location
Hyatt Maui, HI
ISSN
1093-0167
Print_ISBN
978-1-4673-1073-4
Type
conf
DOI
10.1109/VTS.2012.6231117
Filename
6231117
Link To Document