Through-Silicon Hole Interposers for 3-D IC Integration

Author

Lau, John H. ; Ching-Kuan Lee ; Chau-Jie Zhan ; Sheng-Tsai Wu ; Yu-Lin Chao ; Ming-Ji Dai ; Ra-Min Tain ; Heng-Chieh Chien ; Jui-Feng Hung ; Chun-Hsien Chien ; Ren-Shing Cheng ; Yu-Wei Huang ; Yu-Mei Cheng ; Li-Ling Liao ; Wei-Chung Lo ; Ming-Jer Kao

Author_Institution

Electron. & Optoelectron. Res. Lab., Ind. Technol. Res. Inst., Hsinchu, Taiwan

Volume

4

Issue

9

fYear

2014

fDate

Sept. 2014

Firstpage

1407

Lastpage

1419

Abstract

In this investigation, a system-in-package (SiP) that consists of a very low-cost interposer with through-silicon holes (TSHs) and with chips on its top and bottom sides (a real 3-D IC integration) is studied. Emphasis is placed on the fabrication of a test vehicle to demonstrate the feasibility of this SiP technology. The design, materials, and process of the top chip, bottom chip, TSH interposer, and final assembly will be presented. Shock and thermal cycling tests will be performed to demonstrate the integrity of the SiP structure.

Keywords

system-in-package; test equipment; three-dimensional integrated circuits; 3D IC integration; TSH interposer; shock tests; system-in-package; test vehicle; thermal cycling tests; through-silicon hole interposers; Resists; Silicon; Substrates; Through-silicon vias; Tin; Vehicles; 2.5D/3D IC integration; interposer; re-distribution layer; through-silicon hole; through-silicon via;

fLanguage

English

Journal_Title

Components, Packaging and Manufacturing Technology, IEEE Transactions on

Publisher

ieee

ISSN

2156-3950

Type

jour

DOI

10.1109/TCPMT.2014.2339832

Filename

6877650