Title :
Asymmetric latches and nonideal performance of parallel ADCs
Author :
Fernandes, Jorge R. ; Silva, Manuel M.
Author_Institution :
INESC, Lisbon, Portugal
Abstract :
We study the contribution of both bipolar and CMOS latches to the input offset voltage of the latched comparators that are used in the front-end of high-speed analog to digital converters. We then relate the occurrence of missing codes and the nonlinearity errors in the converter to the comparators´ offset voltage. This provides useful guidelines for the design of parallel converters
Keywords :
CMOS integrated circuits; analogue-digital conversion; bipolar integrated circuits; coding errors; comparators (circuits); flip-flops; CMOS latches; asymmetric latches; bipolar latches; front-end ADC; high-speed A/D converters; input offset voltage; latched comparators; missing codes; nonideal performance; nonlinearity errors; parallel ADCs; Analog computers; Analog-digital conversion; Concurrent computing; Differential amplifiers; Differential equations; High performance computing; Inverters; Linearity; MOSFETs; Voltage;
Conference_Titel :
Electrotechnical Conference, 1994. Proceedings., 7th Mediterranean
Conference_Location :
Antalya
Print_ISBN :
0-7803-1772-6
DOI :
10.1109/MELCON.1994.381012
