DocumentCode :
2505280
Title :
Interconnect design challenges in source synchronous simultaneous bi directional links
Author :
Canagasaby, Karthisha S. ; Rajagopalan, Srinivasan ; Dabral, Sanjay
Author_Institution :
Intel Corp., Santa Clara, CA, USA
fYear :
2002
fDate :
21-23 Oct. 2002
Firstpage :
11
Lastpage :
14
Abstract :
Source synchronous simultaneous bi-directional (SS-SBD) link modeling and correlation to measured data are discussed. Source synchronous implementation details such as strobe-data routing, cross talk minimization, and pseudo-differential reference voltage routing are also elaborated.
Keywords :
circuit layout CAD; circuit simulation; crosstalk; integrated circuit interconnections; integrated circuit layout; integrated circuit measurement; integrated circuit packaging; network routing; SS-SBD link modeling; cross talk minimization; interconnect design; measured data correlation; pseudo-differential reference voltage routing; source synchronous simultaneous bidirectional links; strobe-data routing; synchronous implementation; Bandwidth; Bismuth; Character generation; Connectors; Packaging; Routing; Scalability; Semiconductor device measurement; Testing; Vehicles;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Electrical Performance of Electronic Packaging, 2002 IEEE 11th Topical Meeting on
Conference_Location :
Monterey, CA, USA
Print_ISBN :
0-7803-7451-7
Type :
conf
DOI :
10.1109/EPEP.2002.1057872
Filename :
1057872
Link To Document :
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