Testing stuck-open faults in CMOS circuits using single test patterns

It is known that not all defects in CMOS circuits can be represented by the stuck-at fault model. An example is the transistor stuck-open fault. The main problem with stuck-open faults is that they force a combinational circuit to behave as a sequential network. It has been shown that, in general, stuck-open faults require a sequence of two consecutive test patterns to guarantee a test. Furthermore, robust tests that can detect stuck-open faults independent of glitches and circuit delays may not exist for all stuck-open faults. This paper presents a technique to modify CMOS circuits so that any transistor stuck-open fault in the circuit can be detected using only single test patterns. Two additional transistors, an additional input line, and an additional inverter at the output of the circuit are required for this purpose