The implementation of 2D FFT using multiple topology on 4×4 Torus

In this paper, we proposed 2D FFT for 8times8 matrix without transpose of data by using multiple topology on 4times4 Torus. The proposed 2D FFT used parallel operation on 1D FFT and applied an effective calculation by executing a pipeline operation. We implement the proposed architecture on Xilinx Virtex-IV device and a detailed evaluation has been reported based on maximum system frequency, chip area and image size. The implementation results show that the core speed of the proposed FFT architecture is around 157.3 MHz and it occupies 11733 slices. The average SQNR for various images is 61.9 dB. To compare the proposed 2D FFT with other methods, we can see that frame per second is improved 8 times.