Efficient representation of multi-bit data bus structures by symmetric two-line models

This paper presents several methods that model a multi-bit data bus structure by a two-line equivalent. A rigorous approach using formal matrix reduction results in an accurate but asymmetric model which is inconvenient to use in simulating complex systems because the rest of the system needs be adjusted accordingly. Forcing the equivalent two-line model to be symmetric gives the advantage of applying the even- and odd-mode concept, but can lose accuracy in highly coupled lines. A novel approach is shown in this paper to include secondary coupling and achieve an equivalent, symmetric, and accurate two-line model.