Spread source/drain (SSD) MOSFET using selective silicon growth for 64 Mbit DRAMs

Author

Yamada, T. ; Samata, S. ; Takato, H. ; Matsushita, Y. ; Hieda, K. ; Nitayama, A. ; Horiguchi, F. ; Masuoka, F.

Author_Institution

Toshiba Corp., Kawasaki, Japan

fYear

1989

fDate

3-6 Dec. 1989

Firstpage

35

Lastpage

38

Abstract

A novel MOSFET structure which has a small occupied area for 64-Mb DRAMs (dynamic RAMs) is proposed. The source-drain regions are raised by using a selective silicon growth technique. Because of lateral growth of the silicon over the gate and the field, the contact area can overlap the gate and the field. Moreover, the shallow source-drain junction of the raised source-drain structure realizes the reduction of the gate length and the isolation spacing. As a result, the MOSFET can minimize the total occupied area. It has been verified that this MOSFET has the potential to realize high-density LSIs such as 64-Mb DRAMs.<>

Keywords

DRAM chips; MOS integrated circuits; VLSI; elemental semiconductors; insulated gate field effect transistors; semiconductor growth; silicon; 64 Mbit; DRAMs; MOSFET structure; SSD; contact area; gate length; high-density LSIs; isolation spacing; lateral growth; occupied area; raised source-drain structure; shallow source-drain junction; source-drain regions; spread source/drain structure; Fabrication; Implants; MOSFET circuits; Random access memory; Silicon; Temperature; Ultra large scale integration;

fLanguage

English

Publisher

ieee

Conference_Titel

Electron Devices Meeting, 1989. IEDM '89. Technical Digest., International

Conference_Location

Washington, DC, USA

ISSN

0163-1918

Print_ISBN

0-7803-0817-4

Type

conf

DOI

10.1109/IEDM.1989.74216

Filename

74216