DocumentCode :
2506420
Title :
Study of package EMI reduction for GHz microprocessors
Author :
He, Jiangqi ; Zhong, Dong ; Ji, Steven Yun ; Ji, Gang ; Li, Yuan-Liang
Author_Institution :
Intel Corp., Chandler, AZ, USA
fYear :
2002
fDate :
21-23 Oct. 2002
Firstpage :
271
Lastpage :
274
Abstract :
As the operating frequency of the processor approaches 1 GHz and beyond, the package dimensions are no longer small when compared to the wavelength. In order to reduce the emissions from the package, it is necessary to include certain package design features. Three different package designs are investigated to study their relative efficiency in suppressing the emissions. The first package design uses ground patches to reduce cross talk. This scheme was observed to be increasing emissions beyond 1.5 GHz. The second package design utilized stitching vias to suppress the radiation. This scheme was observed to be ineffective in suppressing emissions due to many existing power and ground vias within the area under the die. The existing vias with checkerboard for low loop inductance design results excellent EMI reduction up to 20 GHz. The third design uses the retreated power plane to reduce the emission, and it shows good performance.
Keywords :
crosstalk; electromagnetic interference; high-speed integrated circuits; integrated circuit packaging; interference suppression; microprocessor chips; 1 to 20 GHz; 1.5 GHz; EMI radiation; EMI suppression; GHz microprocessors; crosstalk reduction; ground patches; low loop inductance design; package EMI reduction; retreated power plane; stitching vias; Clocks; Electromagnetic interference; Electromagnetic radiation; FCC; Frequency; Helium; Inductance; Microprocessors; Packaging; Prototypes;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Electrical Performance of Electronic Packaging, 2002 IEEE 11th Topical Meeting on
Conference_Location :
Monterey, CA, USA
Print_ISBN :
0-7803-7451-7
Type :
conf
DOI :
10.1109/EPEP.2002.1057930
Filename :
1057930
Link To Document :
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