Title :
Floating body effects in partially-depleted SOI CMOS circuits
Author :
Lu, P.F. ; Ji, Jean ; Chuang, C.T. ; Wagner, L.F. ; Hsieh, C.M. ; Kuang, Jente B. ; Hsu, L. ; Pelella, Mario M ; Chu, S.
Author_Institution :
Res. Div., IBM Thomas J. Watson Res. Center, Yorktown Heights, NY
Abstract :
This paper presents a detailed study on the impact of floating body in partially-depleted (PD) SOI MOSFET on various digital VLSI CMOS circuit families. The parasitic bipolar effect resulting from the floating body is shown to degrade the circuit noise margin and stability in general. In certain dynamic circuits and wide multiplexers, the parasitic bipolar effect is shown to cause logic state error if not properly accounted for
Keywords :
CMOS logic circuits; VLSI; circuit stability; equivalent circuits; integrated circuit modelling; integrated circuit noise; silicon-on-insulator; Si; circuit noise margin; digital VLSI CMOS circuit; dynamic circuits; floating body effects; parasitic bipolar effect; partially-depleted SOI CMOS circuits; stability; CMOS digital integrated circuits; Circuit stability; Circuit topology; Degradation; FETs; Impact ionization; MOSFET circuits; Semiconductor device modeling; Silicon; Switching circuits;
Conference_Titel :
Low Power Electronics and Design, 1996., International Symposium on
Conference_Location :
Monterey, CA
Print_ISBN :
0-7803-3571-6
DOI :
10.1109/LPE.1996.547496
