DocumentCode :
2507337
Title :
Energy and performance evaluation of a dimension order routing algorithm for Mesh-of-Tree based Network-on-Chip architecture
Author :
Manna, Kanchan ; Chattopadhyay, Santanu ; Gupta, Indranil Sen
Author_Institution :
Sch. of Inf. Technol., Indian Inst. of Technol., Kharagpur, India
fYear :
2010
fDate :
17-19 Dec. 2010
Firstpage :
1
Lastpage :
4
Abstract :
This paper proposes a new dimension order routing algorithm for Mesh-of-Tree based Network-on-Chip design. It simplifies the router design as well. It results in significant saving in the energy consumed by the network. For uniform traffic, the saving is as high as 63%. It offers the flexibility of designing routers of different sizes for mapping of applications.
Keywords :
network routing; network synthesis; network-on-chip; dimension order routing algorithm; mesh-of-tree network-on-chip architecture; router design; Computer architecture; IP networks; Routing; Routing protocols; System-on-a-chip; Throughput; Topology; DOR; Deterministic routing; Interconnection network; MoT; NoC;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
India Conference (INDICON), 2010 Annual IEEE
Conference_Location :
Kolkata
Print_ISBN :
978-1-4244-9072-1
Type :
conf
DOI :
10.1109/INDCON.2010.5712666
Filename :
5712666
Link To Document :
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