Reliability investigations of different bumping processes for flip chip and TAB applications

Author

Jung, E. ; Kloeser, J. ; Nave, J. ; Engelmann, G. ; Dietrich, L. ; Zakel, E. ; Reichl, H.

Author_Institution

Fraunhofer-Inst. fur Zuverlassigkeit und Mikrointegration, Berlin, Germany

fYear

1996

fDate

14-16 Oct 1996

Firstpage

274

Lastpage

281

Abstract

Presently, a number of bump metallurgies are used for flip chip and TAB technology. However, no conclusive characterisation of the processes used and reliability obtained is available up to now. For wafer bumping, alloys of electroplated PbSn5, PbSn63, AuSn20 and metals like Au are used as well as electroless Ni(P)-Au deposition. Flexible bumping processes like Au stud bumping and mechanical bumping with PbSn solders on a solder wettable UBM are evaluated as alternatives, which are of essential importance for flip chip or TAB especially for small and medium volume applications. Reliability investigations on these used metallurgies are performed. The mechanical stability of the bumps is tested after thermal cycling, taking special care in the determination of the failure mode. Finally, the results are characterized, compared and evaluated

Keywords

flip-chip devices; lead bonding; reliability; soldering; tape automated bonding; Au; AuSn; NiPAu; PbSn; TAB technology; UBM; bump metallurgy; electroless deposition; electroplated alloy; failure mode; flip chip technology; mechanical bumping; mechanical stability; reliability; soldering; stud bumping; thermal cycling; wafer bumping; Assembly; Flip chip; Frequency; Gold alloys; Integrated circuit interconnections; Integrated circuit packaging; Integrated circuit reliability; Manufacturing; Nickel alloys; Thermal stresses;

fLanguage

English

Publisher

ieee

Conference_Titel

Electronics Manufacturing Technology Symposium, 1996., Nineteenth IEEE/CPMT

Conference_Location

Austin, TX

ISSN

1089-8190

Print_ISBN

0-7803-3642-9

Type

conf

DOI

10.1109/IEMT.1996.559743

Filename

559743