DocumentCode :
2508502
Title :
Backtracking Optimized DDG Directed Scheduling Algorithm for Clustered VLIW Architectures
Author :
Xu, Yang ; Zhizhong, Tang ; Deyuan, Guo ; Hu, He
Author_Institution :
Dept. of Comput. Sci., Tsinghua Univ., Beijing, China
fYear :
2011
fDate :
18-19 June 2011
Firstpage :
82
Lastpage :
85
Abstract :
This work presents an instruction schedule approach to improve the performance of clustered VLIW architectures. The proposed scheme is based on a preliminary scheduling phase directed though analyzing of Data Dependence Graph (DDG) and a backtracking optimization scheduling phase bringing further improvement by balancing the workloads through clusters and minimizing the penalties of inter-cluster data communications simultaneously. We have implemented and evaluated the proposed scheme with UTDSP benchmarks. Results show a significant speed-up in performance. The speedup can up to 38.58%, with average speedup ranging from 23.91% (2-Clusters) to up to 26.78% (4-Clusters).
Keywords :
directed graphs; instruction sets; optimisation; pattern clustering; scheduling; UTDSP benchmarks; backtracking optimization scheduling phase; clustered VLIW architectures; data dependence graph; directed scheduling algorithm; intercluster data communication; preliminary scheduling phase; Arrays; Optimization; Processor scheduling; Schedules; Scheduling; VLIW; clustered VLIW architecture; instruction scheduling; performance speedup;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Future Computer Sciences and Application (ICFCSA), 2011 International Conference on
Conference_Location :
Hong Kong
Print_ISBN :
978-1-4577-0317-1
Type :
conf
DOI :
10.1109/ICFCSA.2011.25
Filename :
5968031
Link To Document :
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